Analyzing Power and Energy Efficiency of Bitonic Mergesort Based on Performance Evaluation

In graphics processing unit (GPU) computing community, bitonic mergesort (BM) is recognized as one of the most investigated sorting algorithms. It is specially designed for parallel architectures, requires minor inter-process communication, can be implemented in-place, and is logically appropriate for single instructions multiple data platforms. In addition, GPUs have shown tremendous improvements in power and performance efficiency and thus have become essential ingredients in pursuit of the prospective exascale systems whose major obstacle is the excessive power consumption. In a recent research work, we found that fundamental software building blocks can offer a reasonable amount of power and energy saving that can offer new ways to tackle the power obstacle of the prospective exascale systems. We evaluated average peak power, average energy, and average kernel runtime of BM under various workloads and compared it with advanced quicksort (AQ). The results showed that BM outperformed AQ based on all the three metrics in most cases. In this paper, we further investigate BM to identify the factors that result in its underlying power and energy efficiency advantage over AQ. We analyze the power and energy efficiency of BM and AQ based on their performance evaluation on NVIDIA K40 GPU. The performance of both the algorithms is investigated using various experiments offered by NVIDIA Nsight Visual Studio.