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A Framework for Hardware Efficient Reusable IP Core for Grayscale Image CODEC
Author(s) -
Anirban Sengupta,
Dipanjan Roy,
Saraju P. Mohanty,
Peter Corcoran
Publication year - 2018
Publication title -
ieee access
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.587
H-Index - 127
ISSN - 2169-3536
DOI - 10.1109/access.2017.2776293
Subject(s) - aerospace , bioengineering , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , engineering profession , fields, waves and electromagnetics , general topics for engineers , geoscience , nuclear engineering , photonics and electrooptics , power, energy and industry applications , robotics and control systems , signal processing and analysis , transportation
This paper proposes two major novelties. First, we provide a mathematical framework for hardware resource efficient IP core-based image compression and decompression (CODEC). The framework includes CODEC functions that are capable of determining the pixel intensities of a compressed gray scale image using significantly lesser hardware resources. Digital pixel values of the original image are fed as an input to the functions of proposed IP framework and compressed digital pixel values of compressed image generated. Similarly, digital pixel values of the compressed image are fed into other functions of the proposed framework for image decompression. Second, the second novelty is using the derived IP functions to propose designs of reusable IP cores for complete Haar wavelet transformation (HWT)-based lossy image CODEC. Testing of images from various data sets (NASA, medical applications, and so on) in terms of hardware resources, image quality, and compression efficiency have indicated that the proposed IP core framework was successful in achieving hardware efficient CODEC compared with JPEG and conventional HWT CODECs.

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