Building Emulation Framework for Non-Volatile Memory

Emerging non-volatile memory (NVM) requires refactoring of the hardware and software stacks used on current computer systems. Modern researchers typically rely on simulators to test their innovations. Unfortunately, running a simulation requires orders of magnitude more time than performing a native run, and most simulation platforms are difficult to modify or debug. In this paper, we propose using emulation to reduce the substantial simulation overhead by proposing an extensible lightweight emulation framework called LEEF. Unlike previous NVM emulation implementations, which rely on specific hardware and use simple performance models, LEEF is built on a detailed performance model implemented through performance monitoring events that can be found on most commodity processors. LEEF also exposes a realsystem memory trace generation interface for trace-based memory simulators. Using the traces, simulation results can be analyzed and integrated into future LEEF emulations. The results of experiments show that LEEF is more accurate than prior emulation approaches. We also present two case studies of recent microarchitectural innovations simulated on LEEF. To the best of our knowledge, this is the first work that combines simulation with memory emulation.