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Thermal- and Performance-Aware Address Mapping for the Multi-Channel Three-Dimensional DRAM Systems
Author(s) -
Shu-Yen Lin,
Jin-Yi Lin
Publication year - 2017
Publication title -
ieee access
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.587
H-Index - 127
ISSN - 2169-3536
DOI - 10.1109/access.2017.2690323
Subject(s) - aerospace , bioengineering , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , engineering profession , fields, waves and electromagnetics , general topics for engineers , geoscience , nuclear engineering , photonics and electrooptics , power, energy and industry applications , robotics and control systems , signal processing and analysis , transportation
In this paper, we proposed thermal- and performance-aware address mapping (TPAMAP) for the multi-channel 3-D DRAM systems. TPAMAP reduces the thermal problem from the vertical stacking of the active banks in different DRAM channels and supports the mappings with the design tradeoffs of the temperature and performance. In our experiments, the peak temperature can be reduced by 1.1 °C ~ 12.3 °C for the 3-D DRAM system using TPAMAP. The cost function for the constraints of the temperature and performance is also proposed. In hardware design, we demonstrate the low-cost feature of TPAMAP in our hardware design.

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