English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Tools annual

Global: Zendy Free Plan

Global: Zendy Tools monthly

Global: Zendy Plus monthly

An injection-locked frequency divider topology for wide locking-range and high-order division is presented. Based on the theoretical analysis of the locking-range and injection locking characteristic, we propose locking-range enhancement techniques and high-order dividing topology. Fabricated in a 0.18-&#x03BC;m BiCMOS process, three test circuits are designed with only a standard CMOS, aiming at input frequency ranges of 7.8, 11.1, and 11.7 GHz. The 7.8-GHz divide-by-2 ILFD consumes 2.9 mW with a locking range of 692 MHz operated from a 1.5 V supply. The optimized dual injection method improves the locking range by a factor of 10. The 11.1-GHz divide-by-3 ILFD employs an even-harmonic phase tuning technique and the proposed technique improves the locking range by 25%. The core of the 11.1-GHz ILFD consumes 6.15 mW from a 1.8 V supply. For the 11.7-GHz divide-by-3 ILFD, a self-injection technique is proposed that utilizes harmonic conversion and self-injection to improve phase-noise, locking-range, and input sensitivity simultaneously. By employing harmonic tuning and self-injection, odd-order division is enabled with 47.8% enhancement in the locking-range and 15.7-dBc/Hz reduction in phase noise.

Injection-Locked Frequency Divider Topology and Design Techniques for Wide Locking-Range and High-Order Division