An Extension of Block Design Methods and an Application in the Construction of Redundant Fault Reducing Circuits for Computers
Author(s) -
R. J. Ord-Smith
Publication year - 1965
Publication title -
the computer journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.319
H-Index - 64
eISSN - 1460-2067
pISSN - 0010-4620
DOI - 10.1093/comjnl/8.1.28
Subject(s) - redundancy (engineering) , computer science , electronic circuit , block (permutation group theory) , parity bit , computer engineering , extension (predicate logic) , simple (philosophy) , theoretical computer science , algorithm , mathematics , programming language , engineering , philosophy , geometry , epistemology , electrical engineering , operating system
In a balanced block design one's aim is to arrange a number of objects in a number of blocks according to certain rules. There is a certain class of design in which the blocks can be conceived as operating upon the objects to produce new objects which, in turn, may enter a further design. In this case not only does the block operator have to be taken into account, but arrangements of objects and blocks, normally regarded as indistinct in a block design, can have an important effect on the properties of the design. These ideas are applied to the design of simple fault detecting and correcting computer redundancy circuits. Here the criterion of goodness for design is not just the fault reducing properties obtained by a single pass of information through the circuit, but the further effect of information encountering a sequence of such circuits. To detect, and more ambitiously to correct, faults which occur in the generation and transmission of information, it is necessary to generate and transmit extra redundant information. This may be achieved either by carrying redundant information bits with the information word (parity bits), or by parallel transmission of the information words in a "bundle" of channels, and comparison at their destination. The latter method would appear wasteful in the amount of redundancy which it demands but has been studied by Pierce (Pierce, 1962) and others, particularly as it is used in biological mechanisms. However, the redundant equipment required is very simple, and the striking success which can be obtained with simple devices suggests that their use in computer circuitry would be effective and economic. This paper uses the block design method for the study of redundancy circuits based on majority vote takers. A computer has been used in a systematic study of these extended block design conditions. A very simple redundancy circuit with good fault reducing properties is described. Though the terms "error detection" and "error correction" are commonly used, we prefer to use the word "fault" in this paper and to reserve "error" for the numerical errors studied in Numerical Analysis.
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