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Stack Cache Memory for Block-Structured Programs
Author(s) -
Lanfranco Lopriore
Publication year - 1994
Publication title -
the computer journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.319
H-Index - 64
eISSN - 1460-2067
pISSN - 0010-4620
DOI - 10.1093/comjnl/37.7.610
Subject(s) - computer science , cache , cache coloring , cache only memory architecture , cache pollution , parallel computing , cache algorithms , smart cache , cache invalidation , page cache , operating system , cpu cache , computer architecture
The architecture of a cache memory is presented, aimed at reducing the memory bandwith requirements of programs written in block-structured, high-level languages. At any given time, the cache contains two portions of the stack area of the running program, corresponding to the global and the local activation records. With respect to traditional cache architectures, the proposed architecture is characterized by increased performance and a reduced complexity of the logic for cache space addressing and management. These results have been obtained by controlling the cache activity at the software level to take advantage of the stack paradigm

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