Open AccessSome improved designs for the digital summation threshold logic (DSTL) gate
Author(s) -
C. R. Edwards
Publication year - 1978
Publication title -
the computer journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.319
H-Index - 64
eISSN - 1460-2067
pISSN - 0010-4620
DOI - 10.1093/comjnl/21.1.73
Subject(s) - computer science , arithmetic , and gate , electronic engineering , logic gate , mathematics , algorithm , engineering
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