Superconducting optoelectronic loop neurons
Author(s) -
Jeffrey M. Shainline,
Sonia Buckley,
Adam N. McCaughan,
Jeffrey T. Chiles,
Amir Jafari Salim,
Manuel Castellanos-Beltran,
Christine A. Donnelly,
Michael L. Schneider,
Richard P. Mirin,
Sae Woo Nam
Publication year - 2019
Publication title -
journal of applied physics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.699
H-Index - 319
eISSN - 1089-7550
pISSN - 0021-8979
DOI - 10.1063/1.5096403
Subject(s) - physics , computer science , neuromorphic engineering , amplifier , optoelectronics , biasing , detector , voltage , artificial neural network , cmos , artificial intelligence , optics , quantum mechanics
Superconducting optoelectronic hardware has been proposed for large-scale neural computing. In this work, we expand upon the circuit and network designs previously introduced. We investigate circuits using superconducting single-photon detectors and Josephson junctions to perform signal reception, synaptic weighting, and integration. Designs are presented for synapses and neurons that perform integration of rate-coded signals as well as detect coincidence events for temporal coding. A neuron with a single integration loop can receive input from thousands of synaptic connections, and many such loops can be employed for dendritic processing. We show that a synaptic weight can be modified via a superconducting flux-storage loop inductively coupled to the current bias of the synapse. Synapses with hundreds of stable states are designed. Spike-timing-dependent plasticity can be implemented using two photons to strengthen and two photons to weaken the synaptic weight via Hebbian-type learning rules. In addition to the synaptic receiver and plasticity circuits, we describe an amplifier chain that converts the current pulse generated when a neuron reaches threshold to a voltage pulse sufficient to produce light from a semiconductor diode. This light is the signal used to communicate between neurons in the network. We analyze the performance of the elements in the amplifier chain to calculate the energy consumption per photon created. The speed of the amplification sequence allows neuronal firing up to at least 20 MHz, independent of connectivity. We consider these neurons in network configurations to investigate near-term technological potential and long-term physical limitations. By modeling the physical size of superconducting optoelectronic neurons, we calculate the area of these networks. A system with 8100 neurons and 330 430 total synapses will fit on a 1 × 1 cm 2 die. Systems of millions of neurons with hundreds of millions of synapses will fit on a 300 mm wafer. For multiwafer assemblies, communication at light speed enables a neuronal pool the size of a large data center ( 10 5 m 2) comprised of trillions of neurons with coherent oscillations at 1 MHz.Superconducting optoelectronic hardware has been proposed for large-scale neural computing. In this work, we expand upon the circuit and network designs previously introduced. We investigate circuits using superconducting single-photon detectors and Josephson junctions to perform signal reception, synaptic weighting, and integration. Designs are presented for synapses and neurons that perform integration of rate-coded signals as well as detect coincidence events for temporal coding. A neuron with a single integration loop can receive input from thousands of synaptic connections, and many such loops can be employed for dendritic processing. We show that a synaptic weight can be modified via a superconducting flux-storage loop inductively coupled to the current bias of the synapse. Synapses with hundreds of stable states are designed. Spike-timing-dependent plasticity can be implemented using two photons to strengthen and two photons to weaken the synaptic weight via Hebbian-type learning rules. In addition...
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