Nanocrystalline silicon oxide stacks for silicon heterojunction solar cells for hot climates
Author(s) -
Jan Haschke,
R. Monnard,
Luca Antognini,
Jean Cattin,
Amir Abdallah,
Brahim Aïssa,
Maulid Kivambe,
Nouar Tabet,
Mathieu Boccard,
Christophe Ballif
Publication year - 2018
Publication title -
aip conference proceedings
Language(s) - English
Resource type - Conference proceedings
SCImago Journal Rank - 0.177
H-Index - 75
eISSN - 1551-7616
pISSN - 0094-243X
DOI - 10.1063/1.5049262
Subject(s) - materials science , silicon , optoelectronics , nanocrystalline material , oxide , heterojunction , nanocrystalline silicon , monocrystalline silicon , doping , solar cell , crystalline silicon , nanotechnology , metallurgy , amorphous silicon
Today, solar cells are generally optimized for 25 °C, whereas in most climates, especially hot and sunny ones, the operating device temperature is usually much higher, e.g. in the range of 60 °C. We investigate the use of n-doped nanocrystalline silicon oxide layers (nc-SiOx:H(n)) as front contact stacks in silicon heterojunction solar cells and compare them with oxide-free front contacts. Whereas a short-circuit current density of 41 mAcm could be obtained due to the increased transparency of the nc-SiOx:H(n) layers, the fill-factor is drastically reduced and leads to a reduced efficiency at 25 °C. Albeit the FF can be partly recovered at 60 °C, the highest efficiencies at 60 °C were so far obtained for the solar cells with oxide-free front contact stacks. INTRODUCTION Usually, solar cell devices are optimized to give the highest performance at standard test conditions (STC), which is at 25 °C. In operation conditions, usually the temperature of the device is much higher, especially in hot and sunny climates [1], [2]. In silicon heterojunction (SHJ) solar cells, charge carrier transport is partly thermally activated due to the existence of transport barriers, which are more easily overcome with increasing temperature. Thus, the optimization for silicon heterojunction solar cells for operation at e.g. 60 °C might be different from the one at 25 °C. Possibly, more transparent layers could be used at the front side as e.g. oxygen-doped layers. While the addition of oxygen might hinder charge carrier transport at 25 °C, transport might be impacted only marginally at 60 °C. In previous experiments [3] it has been shown that with the addition of CO2 during PECVD the transparency of a-Si:H can be increased for wavelengths below 500 nm. However, charger carrier transport is strongly limited, also at 60 °C, for a-SiOx:H(n) versus an a-Si:H(n) front contact, when CO2/SiH4 ratios are chosen such that a significant increase in transparency is obtained (conclusion drawn from previous experiments, data not shown). It is possible to grow nanocrystalline silicon oxide (nc-SiOx:H) films with a filament-like structure that consists of a nanocrystalline silicon (nc-Si:H) phase within an amorphous oxide matrix [4]–[6]. Two strategies have been pursued to increase the crystallinity of the n-contact layer stack: a lower deposition temperature (175°C) and an SiOx-plasma pre-treatment as it was reported that both increase the crystallinity of nanocrystalline silicon [7], [8]. With increased crystallinity, we expect an increased transparency as well as increased conductivity. EXPERIMENTAL Methods: Solar Cell Preparation & Analysis Silicon heterojunction solar cells have been prepared on 240 μm 1-5 Ωcm n-type silicon Fz wafers. As front contact layers, we chose different n-doped stacks as depicted at the bottom of FIGURE 1. The wafers have been wetchemically cleaned and dipped in hydrofluoric solution prior to the deposition of the silicon-based contact layers by plasma enhanced chemical vapor deposition (PECVD). The minority charge carrier collecting contact consists of a stack of intrinsic and p-doped amorphous silicon at the rear side of the wafers (rear junction configuration). The amorphous layers have been deposited at 200 °C. All front-contact nanocrystalline silicon stacks are approximately 16 nm thick. For (v) and (vi), the subjacent a-Si:H(n) layer is approximately 15 nm thick. The nc-SiOx(n) layers of (iii) and (iv) account for approximately two thirds of the stack (~11 nm), while nc-Si(n) accounts for one third (~5 nm). All layer thickness values correspond to depositon on a planar glass sample, we assume the actual layer thicknesses on the textured wafer to be lower by a factor of 1.7. The temperature during the deposition of the nanocrystalline layers was set to either 200°C or 175°C (indicated with red and blue color respectively in FIGURE 1). The SiOxplasma pre-treatment (samples ii, iv, and vi) was carried out by PECVD in the same chamber and at the same temperature as the nanocrystalline layers with a gas mix of SiH4, H2, and CO2. During a five-second plasma-treatment, no layer is deposited (thickness change not detectable with ellipsometry), but the surface of the subjacent layer is modified to promote crystalline growth [7], [9], [10]. Directly after the plasma-treatment, the nanocrystalline layer is deposited, without vacuum break. A sputtered indium tin oxide (ITO) and a screen-printed Ag grid finalize the front contact. At the rear side, sputtered ITO/Ag forms the rear electrode. The solar cells have been measured on a temperature-controlled chuck, under one-sun AM1.5g irradiation of a AAA solar simulator. The temperatures of the chuck were 25°C and 60°C. SunsVoc and lifetime characteristics have been obtained using a Sinton Instruments lifetime tester. Raman spectroscopy has been carried out with a UV (325 nm) laser. Solar Cell JV Parameter & Raman Crystallinity FIGURE 1 shows the illuminated JV parameters open-circuit voltage (VOC), short-circuit current density (JSC), fill-factor (FF), and efficiency (Eff) of the solar cells as well as implied VOC (iVOC) and fill-factor (iFF) obtained from lifetime measurements after PECVD. The passivation for injection conditions corresponding to VOC and maximum power point (MPP) are on a high level which is reflected by iVOC values above 725 mV and iFF values generally above 85% for the samples. For the devices (iii)-(vi) the VOC is around 715 mV. The lower VOC compared with the iVOC is partly due to the application of a shadow mask during JV measurement and partly due to other damage caused by the TCO deposition, screen-printing and curing. For the devices with a nc-Si:H(n) front contact (i), (ii) deposited at 175 °C the VOC is significantly lower compared with devices with a nc-Si:H(n) front contact deposited at 200 °C, which suggests that the selectivity provided by the layers deposited at 175 °C is insufficient to transmit the iVOC to the external contact. This is most significant when an additional SiOx-plasma is used (ii). Raman measurements suggest a higher crystallinity with the plasma treatment. However, in the experiments shown here, this does not result in increased selectivity as can be seen from the lower FF. Implementing nc-SiOx(n) (iii and iv) in the front contact stack yields a JSC of 41 mAcm which is a gain of 1 mAcm over the oxide-free front contacts (i and ii). This JSC gain is, however, counterbalanced by a reduction in FF and leads thus to a lower efficiency at 25 °C.
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