FPGA-based I/Q chirp generator using first quadrant DDS compression for pulse compression radar
Author(s) -
R. Indra Wijaya,
Ros S. N.,
E. S. Bagus,
Muliawandana Dadan
Publication year - 2016
Publication title -
aip conference proceedings
Language(s) - English
Resource type - Conference proceedings
eISSN - 1551-7616
pISSN - 0094-243X
DOI - 10.1063/1.4958607
Subject(s) - chirp , direct digital synthesizer , pulse compression , computer science , signal generator , electronic engineering , verilog , field programmable gate array , stratix , pulse generator , bandwidth (computing) , radar , computer hardware , frequency synthesizer , engineering , phase locked loop , physics , optics , telecommunications , chip , laser , jitter
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