Reduction of the interfacial trap density of indium-oxide thin film transistors by incorporation of hafnium and annealing process
Author(s) -
MengFang Lin,
Xu Gao,
Nobuhiko Mitoma,
Takio Kizu,
Wei OuYang,
Shinya Aikawa,
Toshihide Nabatame,
Kazuhito Tsukagoshi
Publication year - 2015
Publication title -
aip advances
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.421
H-Index - 58
ISSN - 2158-3226
DOI - 10.1063/1.4905903
Subject(s) - thin film transistor , materials science , annealing (glass) , passivation , indium , threshold voltage , optoelectronics , transistor , oxide , hafnium , thin film , layer (electronics) , voltage , nanotechnology , metallurgy , electrical engineering , zirconium , engineering
The stable operation of transistors under a positive bias stress (PBS) is achieved using Hf incorporated into InOx-based thin films processed at relatively low temperatures (150 to 250 °C). The mobilities of the Hf-InOx thin-film transistors (TFTs) are higher than 8 cm2/Vs. The TFTs not only have negligible degradation in the mobility and a small shift in the threshold voltage under PBS for 60 h, but they are also thermally stable at 85 °C in air, without the need for a passivation layer. The Hf-InOx TFT can be stable even annealed at 150 °C for positive bias temperature stability (PBTS). A higher stability is achieved by annealing the TFTs at 250 °C, originating from a reduction in the trap density at the Hf-InOx/gate insulator interface. The knowledge obtained here will aid in the realization of stable TFTs processed at low temperatures
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