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Zinc-oxide charge trapping memory cell with ultra-thin chromium-oxide trapping layer
Author(s) -
Nazek ElAtab,
Ayman Rizk,
Ali K. Okyay,
Ammar Nayfeh
Publication year - 2013
Publication title -
aip advances
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.421
H-Index - 58
ISSN - 2158-3226
DOI - 10.1063/1.4832237
Subject(s) - trapping , atomic layer deposition , quantum tunnelling , materials science , oxide , layer (electronics) , optoelectronics , threshold voltage , scaling , chromium , equivalent oxide thickness , non volatile memory , silicon , zinc , voltage , nanotechnology , gate oxide , electrical engineering , metallurgy , transistor , engineering , ecology , geometry , mathematics , biology
A functional zinc-oxide based SONOS memory cell with ultra-thin chromium oxide trapping layer was fabricated. A 5 nm CrO2 layer is deposited between Atomic Layer Deposition (ALD) steps. A threshold voltage (Vt) shift of 2.6V was achieved with a 10V programming voltage. Also for a 2V V t shift, the memory with CrO2 layer has a low programming voltage of 7.2V. Moreover, the deep trapping levels in CrO2 layer allows for additional scaling of the tunnel oxide due to an increase in the retention time. In addition, the structure was simulated using Physics Based TCAD. The results of the simulation fit very well with the experimental results providing an understanding of the charge trapping and tunneling physics. © 2013 © 2013 Author(s)

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