Low-voltage and short-channel pentacene field-effect transistors with top-contact geometry using parylene-C shadow masks
Author(s) -
Yoonyoung Chung,
Boris Murmann,
Selvapraba Selvarasah,
Mehmet R. Dokmeci,
Zhenan Bao
Publication year - 2010
Publication title -
applied physics letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 1.182
H-Index - 442
eISSN - 1077-3118
pISSN - 0003-6951
DOI - 10.1063/1.3336009
Subject(s) - shadow mask , materials science , parylene , dielectric , optoelectronics , transistor , gate dielectric , threshold voltage , fabrication , thin film transistor , field effect transistor , atomic layer deposition , nanotechnology , layer (electronics) , voltage , electrical engineering , optics , composite material , physics , engineering , polymer , medicine , alternative medicine , pathology
We have fabricated high-performance top-contact pentacene field-effect transistors using a nanometer-scale gate dielectric and parylene-C shadow masks. The high-capacitance gate dielectric, deposited by atomic layer deposition of aluminum oxide, resulted in a low operating voltage of 2.5 V. The flexible and conformal parylene-C shadow masks allowed fabrication of transistors with channel lengths of L=5, 10, and 20 μm. The field-effect mobility of the transistors was μ=1.14 (±0.08) cm2/V s on average, and the IMAX/IMIN ratio was greater than 106.
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