Effect of grain alignment on interface trap density of thermally oxidized aligned-crystalline silicon films | Zendy

Woong Choi | Zendy; JungKun Lee | Zendy; Alp T. Findikoğlu | Zendy

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Effect of grain alignment on interface trap density of thermally oxidized aligned-crystalline silicon films

Author(s) -

Woong Choi,

JungKun Lee,

Alp T. Findikoğlu

Publication year - 2006

Publication title -

applied physics letters

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 1.182

H-Index - 442

eISSN - 1077-3118

pISSN - 0003-6951

DOI - 10.1063/1.2424655

Subject(s) - materials science , polycrystalline silicon , silicon , crystallite , grain size , capacitor , oxide , capacitance , semiconductor , optoelectronics , voltage , composite material , metallurgy , electrical engineering , electrode , thin film transistor , chemistry , layer (electronics) , engineering

The authors report studies of the effect of grain alignment on interface trap density of thermally oxidized aligned-crystalline silicon (ACSi) films by means of capacitance-voltage (C-V) measurements. C-V curves were measured on metal-oxide-semiconductor (MOS) capacitors fabricated on ⟨001⟩-oriented ACSi films on polycrystalline substrates. From high-frequency C-V curves, the authors calculated a decrease of interface trap density from 2×1012to1×1011cm−2eV−1 as the grain mosaic spread in ACSi films improved from 13.7° to 6.5°. These results demonstrate the effectiveness of grain alignment as a process technique to achieve significantly enhanced performance in small-grained (⩽1μm) polycrystalline Si MOS-type devices.

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