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“Gated-diode” configuration in SOI MOSFET’s: A sensitive tool for evaluating the quality and reliability of the buried Si/SiO[sub 2] interface
Author(s) -
Xuejun Zhao
Publication year - 2001
Publication title -
aip conference proceedings
Language(s) - English
Resource type - Conference proceedings
SCImago Journal Rank - 0.177
H-Index - 75
eISSN - 1551-7616
pISSN - 0094-243X
DOI - 10.1063/1.1354402
Subject(s) - mosfet , silicon on insulator , optoelectronics , diode , materials science , gate oxide , logic gate , electrical engineering , voltage , electronic engineering , silicon , engineering , transistor

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