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Semiconductor product analysis challenges based on the 1999 ITRS
Author(s) -
Thomas Joseph
Publication year - 2001
Publication title -
aip conference proceedings
Language(s) - English
Resource type - Conference proceedings
SCImago Journal Rank - 0.177
H-Index - 75
eISSN - 1551-7616
pISSN - 0094-243X
DOI - 10.1063/1.1354375
Subject(s) - technology roadmap , computer science , product (mathematics) , new product development , semiconductor industry , emerging technologies , technology forecasting , characterization (materials science) , engineering , manufacturing engineering , risk analysis (engineering) , systems engineering , nanotechnology , business , marketing , geometry , mathematics , artificial intelligence , materials science
One of the most significant challenges for technology characterization and future analysis is to keep instrumentation and techniques in step with the development of technology itself. Not only are dimensions shrinking and new materials being employed, but the rate of change is increasing. According to the 1999 International Technology Roadmap for Semiconductors (ITRS) the number and difficulty of the technical challenges continue to increase as technology moves forward. It could be argued that technology cannot be developed without appropriate analytical technique, nevertheless while much effort is being directed at materials and processes, only a small proportion is being directed at analysis. Whereas previous versions of the Semiconductor Industry Association roadmap contained a small number of implicit references to characterization and analysis, the 1999 ITRS contains many explicit references. It is clear that characterization is now woven through the roadmap, and technology developers in all areas appreciate the fact that new instrumentation and techniques will be required to sustain the rate of development the semiconductor industry has seen in recent years. Late in 1999, a subcommittee of the Sematech Product Analysis Forum reviewed the ITRS and identified a top-ten list of challenges which the failure analysis community will face as present technologies are extended and future technologies are developed. This paper discusses the PAF top-ten list of challenges, which is based primarily on the Difficult Challenges tables from each ITRS working group. Eight of the top-ten are challenges of significant technical magnitude, only two could be considered non-technical in nature. Most of these challenges cut across several working group areas and could be considered common threads in the roadmap, ranging from fault simulation and modeling to imaging small features, from electrical defect isolation to reprocessing.

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