CMOS low dropout linear regulator with single Miller capacitor | Zendy

WeiJen Huang | Zendy; ShuiShong Lu | Zendy; Shiqiang Liu | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

CMOS low dropout linear regulator with single Miller capacitor

Author(s) -

WeiJen Huang,

ShuiShong Lu,

Shiqiang Liu

Publication year - 2006

Publication title -

electronics letters

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.375

H-Index - 146

eISSN - 1350-911X

pISSN - 0013-5194

DOI - 10.1049/el:20064062

Subject(s) - low dropout regulator , cmos , bandgap voltage reference , linear regulator , dropout voltage , regulator , line regulation , capacitor , voltage regulator , materials science , voltage , electrical engineering , optoelectronics , electronic engineering , engineering , chemistry , biochemistry , gene

A 2-5V 150 mA CMOS low dropout (LDO) linear regulator with a single Miller capacitor of 4pF is presented. The proposed LDO regulator with a bandgap voltage reference has been fabricated in a 0.35 /spl mu/m CMOS process and the active chip area is 485/spl times/586 /spl mu/m. The maximum output current is 150 mA and the regulated output voltage is 1.8 V.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research