Open AccessBiCMOS dynamic full adder circuit for high-speed parallel multipliers
Author(s) -
H.P. Chen,
H.J. Liao,
J.B. Kuo
Publication year - 1992
Publication title -
electronics letters
Language(s) - Uncategorized
Resource type - Journals
SCImago Journal Rank - 0.375
H-Index - 146
eISSN - 1350-911X
pISSN - 0013-5194
DOI - 10.1049/el:19920709
Subject(s) - bicmos , adder , very large scale integration , cmos , computer science , multiplier (economics) , electronic engineering , reduction (mathematics) , electronic circuit , serial binary adder , electrical engineering , engineering , embedded system , transistor , mathematics , voltage , geometry , economics , macroeconomics
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