Interconnect-Free Multibit Arithmetic and Logic Unit in a Single Reconfigurable 3 μm2 Plasmonic Cavity
Author(s) -
Upkar Kumar,
Aurélien Cuche,
Christian Girard,
Sviatlana Viarbitskaya,
Florian Dell’Ova,
Raminfar Al Rafrafin,
Gérard Colas des Francs,
Sreenath Bolisetty,
Raffaele Mezzenga,
Alexandre Bouhélier,
Erik Dujardin
Publication year - 2021
Publication title -
acs nano
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 5.554
H-Index - 382
eISSN - 1936-086X
pISSN - 1936-0851
DOI - 10.1021/acsnano.1c03196
Subject(s) - computer science , logic gate , electronic circuit , control reconfiguration , adder , interconnection , arithmetic logic unit , electronic engineering , cmos , electrical engineering , computer hardware , embedded system , engineering , telecommunications , algorithm
Processing information with conventional integrated circuits remains beset by the interconnect bottleneck: circuits made of smaller active devices need longer and narrower interconnects, which have become the prime source of power dissipation and clock rate saturation. Optical interchip communication provides a fast and energy-saving option that still misses a generic on-chip optical information processing by interconnect-free and reconfigurable Boolean arithmetic logic units (ALU). Considering metal plasmons as a platform with dual optical and electronic compatibilities, we forge interconnect-free, ultracompact plasmonic Boolean logic gates and reconfigure them, at will, into computing ALU without any redesign nor cascaded circuitry. We tailor the plasmon mode landscape of a single 2.6 μm 2 planar gold cavity and demonstrate the operation and facile reconfiguration of all 2-input logic gates. The potential for higher complexity of the same logic unit is shown by a multi-input excitation and a phase control to realize an arithmetic 2-bit adder.
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