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Ambipolar Deep-Subthreshold Printed-Carbon-Nanotube Transistors for Ultralow-Voltage and Ultralow-Power Electronics
Author(s) -
Luis Portilla,
Jianwen Zhao,
Yan Wang,
Liping Sun,
Fengzhu Li,
Malo Robin,
Miaomiao Wei,
Zheng Cui,
Luigi G. Occhipinti,
Thomas D. Anthopoulos,
Vincenzo Pecunia
Publication year - 2020
Publication title -
acs nano
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 5.554
H-Index - 382
eISSN - 1936-086X
pISSN - 1936-0851
DOI - 10.1021/acsnano.0c06619
Subject(s) - transistor , subthreshold conduction , ambipolar diffusion , materials science , nanotechnology , electronics , carbon nanotube field effect transistor , optoelectronics , electronic circuit , electrical engineering , subthreshold slope , threshold voltage , computer science , voltage , field effect transistor , physics , engineering , electron , quantum mechanics
The development of ultralow-power and easy-to-fabricate electronics with potential for large-scale circuit integration ( i . e ., complementary or complementary-like) is an outstanding challenge for emerging off-the-grid applications, e . g ., remote sensing, "place-and-forget", and the Internet of Things. Herein we address this challenge through the development of ambipolar transistors relying on solution-processed polymer-sorted semiconducting carbon nanotube networks (sc-SWCNTNs) operating in the deep-subthreshold regime. Application of self-assembled monolayers at the active channel interface enables the fine-tuning of sc-SWCNTN transistors toward well-balanced ambipolar deep-subthreshold characteristics. The significance of these features is assessed by exploring the applicability of such transistors to complementary-like integrated circuits, with respect to which the impact of the subthreshold slope and flatband voltage on voltage and power requirements is studied experimentally and theoretically. As demonstrated with inverter and NAND gates, the ambipolar deep-subthreshold sc-SWCNTN approach enables digital circuits with complementary-like operation and characteristics including wide noise margins and ultralow operational voltages (≤0.5 V), while exhibiting record-low power consumption (≤1 pW/μm). Among thin-film transistor technologies with minimal material complexity, our approach achieves the lowest energy and power dissipation figures reported to date, which are compatible with and highly attractive for emerging off-the-grid applications.

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