Hierarchically Self-Assembled Block Copolymer Blends for Templating Hollow Phase-Change Nanostructures with an Extremely Low Switching Current
Author(s) -
Woon Ik Park,
Jong Min Kim,
Jae Won Jeong,
Yoon Hyoung Hur,
Young Joong Choi,
SeHun Kwon,
Seungbum Hong,
You Yin,
Yeon Sik Jung,
Kwang Ho Kim
Publication year - 2015
Publication title -
chemistry of materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 3.741
H-Index - 375
eISSN - 1520-5002
pISSN - 0897-4756
DOI - 10.1021/acs.chemmater.5b00542
Subject(s) - materials science , phase change memory , non volatile memory , switching time , miniaturization , optoelectronics , electrode , nanotechnology , nanoimprint lithography , resistive random access memory , layer (electronics) , medicine , chemistry , alternative medicine , pathology , fabrication
Phase change memory (PCM) is one of the most promising candidates for next-generation nonvolatile memory devices because of its high speed, excellent reliability, and outstanding scalability. However, the high switching current of PCM devices has been a critical hurdle to realize low-power operation. Although one solution is to reduce the switching volume of the memory, the resolution limit of photo- lithography hinders further miniaturization of device dimensions. In this study, we employed unconventional self-assembly geometries obtained from blends of block copolymers (BCPs) to form ring-shaped hollow PCM nanostructures with an ultrasmall contact area between a phase- change material (Ge2Sb2Te5) and a heater (TiN) electrode. The high- density (approximately 0.1 terabits per square inch) PCM nanoring arrays showed extremely small switching current of 2−3 μA. Furthermore, the relatively small reset current of the ring-shaped PCM compared to the pillar-shaped devices is attributed to smaller switching volume, which is well supported by electro-thermal simulation results. This approach may also be extended to other nonvolatile memory device applications such as resistive switching memory and magnetic storage devices, where the control of nanoscale geometry can significantly affect device performances.
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