SHARC - Simulation and Verification of Hierarchical Embedded Microelectronic Systems
Author(s) -
Ralph Weissnegger,
Christian Kreiner,
Markus Pistauer,
Kay Römer,
Christian Steger
Publication year - 2017
Publication title -
procedia computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.334
H-Index - 76
ISSN - 1877-0509
DOI - 10.1016/j.procs.2017.05.407
Subject(s) - computer science , functional verification , functional safety , time to market , automotive industry , embedded system , reliability (semiconductor) , key (lock) , systems design , formal verification , systems engineering , design flow , cyber physical system , reliability engineering , software engineering , engineering , computer network , power (physics) , physics , computer security , algorithm , quantum mechanics , aerospace engineering , operating system
The modern automotive market is heading towards fully automated self-driving cars. Following this evolution, the amount of new assistance features for ensuring safe and reliable operations is rising, thus the design and verification of electric/electronic systems is becoming more and more complex. Simulation-based verification is key nowadays to test the reliability of a system, since the costs for physical tests cannot be handled anymore. Current tools and design flows hit the limits of complexity and therefore are not capable to efficiently address software and hardware design and optimization in a joint way. Furthermore, the technological, organizational and design gap in today's flows are not covered by current methods and tools. To cope with the high complexity in the integration of embedded systems, the use of advanced methods and design tools is more relevant than ever. In this work, we present a design, simulation and verification framework named SHARC. This framework allows an efficient verification of safety- critical networked embedded systems regarding functional safety (ISO 26262). Moreover, we achieve to merge a simulation-based approach, including virtual prototyping, with quantified reliability analysis without losing consistency.
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