Parallel application benchmarks and performance evaluation of the Intel Xeon 7500 family processors
Author(s) -
Piotr Kopta,
Michał Kulczewski,
Krzysztof Kurowski,
Tomasz Piontek,
Paweł Gepner,
Mariusz Puchalski,
Jacek Komasa
Publication year - 2011
Publication title -
procedia computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.334
H-Index - 76
ISSN - 1877-0509
DOI - 10.1016/j.procs.2011.04.039
Subject(s) - computer science , xeon phi , scalability , xeon , synchronization (alternating current) , parallel computing , computer architecture , parallelism (grammar) , software , domain (mathematical analysis) , process (computing) , operating system , computer network , mathematical analysis , channel (broadcasting) , mathematics
With the recent advent of novel multi- and many-core hardware architectures, application programmers have to deal with many hardware-specific implementation details and have to be familiar with software optimization techniques to benefit from new high-performance computing machines. Highly effcient parallel application design is in fact an interdisciplinary process involving domain specific and IT experts. Therefore, this paper aims to present early experiences with computationally demanding applications, development efforts and evaluation of their performance on the new family of Intel Xeon 7500 processors. We selected two application benchmarks applicable to real quantum chemistry and Computational Fluid Dynamics (CFD) problems as they can potentially take advantage of parallel processing on novel hardware architectures and built-in new features. Additionally, we discuss various parallel software improvements to mentioned applications, including appropriate changes to data structures as well as to communication and synchronization routines to deal with multi-level parallelism and hybrid hardware architectures. The obtained results confirmed that new hardware solutions can improve the overall application performance. However, in order to obtain a high level of parallel scalability various application modifications and tuning procedures are required as hardware configurations, including processors characteristics, interconnects and topologies, and they have a great influence on large-scale simulations
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