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SLID-ICV Vertical Integration Technology for the ATLAS Pixel Upgrades
Author(s) -
A. Macchiolo,
L. Andricek,
H.-G. Moser,
R. Nisius,
Rainer Richter,
P. Weigell
Publication year - 2012
Publication title -
physics procedia
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.26
H-Index - 61
ISSN - 1875-3892
DOI - 10.1016/j.phpro.2012.02.444
Subject(s) - chip , atlas (anatomy) , pixel , process (computing) , materials science , computer science , detector , embedded system , computer hardware , telecommunications , geology , operating system , artificial intelligence , paleontology
We present the results of the characterization of pixel modules composed of 75μm thick n-in-p sensors and ATLAS FE-I3 chips, interconnected with the SLID (Solid Liquid Inter-Diffusion) technology. This technique, developed at Fraunhofer-EMFT, is explored as an alternative to the bump-bonding process. These modules have been designed to demonstrate the feasibility of a very compact detector to be employed in the future ATLAS pixel upgrades, making use of vertical integration technologies. This module concept also envisages Inter-Chip-Vias (ICV) to extract the signals from the backside of the chips, thereby achieving a higher fraction of active area with respect to the present pixel module design. In the case of the demonstrator module, ICVs are etched over the original wire bonding pads of the FE-I3 chip. In the modules with ICVs the FE-I3 chips will be thinned down to 50 um. The status of the ICV preparation is presented

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