Verification of Scenario-based Specifications using Templates | Zendy

Girish Keshav Palshikar | Zendy; Purandar Bhaduri | Zendy

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Verification of Scenario-based Specifications using Templates

Author(s) -

Girish Keshav Palshikar,

Purandar Bhaduri

Publication year - 2005

Publication title -

electronic notes in theoretical computer science

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.242

H-Index - 60

ISSN - 1571-0661

DOI - 10.1016/j.entcs.2004.12.017

Subject(s) - computer science , modular design , template , notation , model checking , simple (philosophy) , programming language , formal methods , formal verification , sequence (biology) , theoretical computer science , distributed computing , software engineering , mathematics , philosophy , arithmetic , epistemology , biology , genetics

pecifying dynamic behaviour of a system by listing scenarios of its interactions has become a popular practice. Message sequence chart (MSC) is a rigorous and widely used notation for specifying such scenarios of system behaviour. High-level MSCs (HMSC) provide hierarchical and modular composition facilities for constructing complex scenarios from basic MSCs. Although the general problem of formal verification of properties of HMSCs is intractable, we propose a framework for restricted verification. We present simple templates for commonly used types of properties and discuss efficient algorithms for verifying them

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