Sub 1 V CMOS bandgap reference design techniques: a survey | Zendy

Christian Fayomi | Zendy; Gilson Wirth | Zendy; Hervé Facpong Achigui | Zendy; Akira Matsuzawa | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

Sub 1 V CMOS bandgap reference design techniques: a survey

Author(s) -

Christian Fayomi,

Gilson Wirth,

Hervé Facpong Achigui,

Akira Matsuzawa

Publication year - 2009

Publication title -

analog integrated circuits and signal processing

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.24

H-Index - 49

eISSN - 1573-1979

pISSN - 0925-1030

DOI - 10.1007/s10470-009-9352-4

Subject(s) - bandgap voltage reference , cmos , electronic engineering , relay , voltage , electrical engineering , electronic circuit , engineering , voltage reference , computer science , physics , dropout voltage , power (physics) , quantum mechanics

This paper presents a review of constraints, limitation factors and challenges to implement sub 1 V CMOS bandgap voltage reference (BVR) circuits in today’s and future submicron technology. Moreover, we provide insight analysis of BVR circuit architectures a designer can relay upon when building CMOS voltage reference.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research