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Logic Synthesis and Verification Algorithms
Author(s) -
Gary D. Hachtel,
Fabio Somenzi
Publication year - 2002
Publication title -
kluwer academic publishers ebooks
Language(s) - English
Resource type - Book series
DOI - 10.1007/b117060
Subject(s) - computer science , high level verification , automation , intelligent verification , very large scale integration , logic synthesis , electronic design automation , algorithm , cad , functional verification , programming language , computer architecture , logic gate , formal verification , embedded system , engineering drawing , engineering , software , software development , mechanical engineering , software construction

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