A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs | Zendy

Jason Lohn | Zendy; Greg Larchev | Zendy; Ronald F. DeMara | Zendy

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A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs

Author(s) -

Jason Lohn,

Greg Larchev,

Ronald F. DeMara

Publication year - 2003

Publication title -

lecture notes in computer science

Language(s) - English

Resource type - Book series

SCImago Journal Rank - 0.249

H-Index - 400

eISSN - 1611-3349

pISSN - 0302-9743

ISBN - 3-540-00730-X

DOI - 10.1007/3-540-36553-2_5

Subject(s) - virtex , field programmable gate array , computer science , evolvable hardware , combinational logic , routing (electronic design automation) , evolutionary algorithm , genetic algorithm , embedded system , reconfigurable computing , parallel computing , computer architecture , logic gate , algorithm , artificial intelligence , machine learning

Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic congurations as opposed to evolving theintra-cellrouting.SincethemajorityoftransistorsinatypicalFPGA are dedicated to interconnect, nearly 80% according to one estimate, evolutionary fault-recovery systems should benet by accommodating routing. In this paper, we propose an evolutionary fault-recoverysystem employingageneticrepresentationthattakesintoaccountbothlogicand routing congurations. Experiments were run using a software model of theXilinxVirtexFPGA.WereportthatusingfourVirtexcombinational logic blocks, we wereable to evolvea 100% accurate quadrature decoder nite state machine in the presence of a stuck-at-zero fault.

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