Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems | Zendy

Kazuo Sakiyama | Zendy; Nele Mentens | Zendy; Lejla Batina | Zendy; Bart Preneel | Zendy; Ingrid Verbauwhede | Zendy

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Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems

Author(s) -

Kazuo Sakiyama,

Nele Mentens,

Lejla Batina,

Bart Preneel,

Ingrid Verbauwhede

Publication year - 2006

Publication title -

lecture notes in computer science

Language(s) - English

Resource type - Book series

SCImago Journal Rank - 0.249

H-Index - 400

eISSN - 1611-3349

pISSN - 0302-9743

DOI - 10.1007/11802839_43

Subject(s) - datapath , reconfigurability , computer science , arithmetic logic unit , field programmable gate array , public key cryptography , cryptosystem , modular design , adder , cryptography , arithmetic , key (lock) , modular arithmetic , elliptic curve cryptography , embedded system , computer hardware , computer architecture , parallel computing , encryption , operating system , algorithm , mathematics , latency (audio) , telecommunications

This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides a high perfor- mance for both RSA and Elliptic Curve Cryptography (ECC). In addi- tion, we introduce another reconfigurability for the flip-flops in order to make the best of hardware resources. The results of FPGA implemen- tation show that better performance is obtained for ECC on the same hardware platform.

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