Optimized Karatsuba squaring on 8‐bit AVR processors | Zendy

Seo Hwajeong | Zendy; Liu Zhe | Zendy; Choi Jongseok | Zendy; Kim Howon | Zendy

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Optimized Karatsuba squaring on 8‐bit AVR processors

Author(s) -

Seo Hwajeong,

Liu Zhe,

Choi Jongseok,

Kim Howon

Publication year - 2015

Publication title -

security and communication networks

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.446

H-Index - 43

eISSN - 1939-0122

pISSN - 1939-0114

DOI - 10.1002/sec.1279

Subject(s) - computer science , multiplication (music) , parallel computing , elliptic curve cryptography , arithmetic , cryptography , block (permutation group theory) , algorithm , encryption , mathematics , operating system , public key cryptography , combinatorics , geometry

Multi‐precision squaring is one of the performance‐critical operations for implementation of elliptic curve cryptography. This paper continues the line of research on high‐speed multi‐precision squaring on embedded processors. In particular, we present an optimized Karatsuba squaring method for 8‐bit AVR processors. We compute the multiplication part with the fastest Karatsuba multiplication, and then the remaining two squaring parts are conducted with the fastest sliding block doubling squaring. As a result, The proposed method sets the new speed records for multi‐precision squaring, improving the execution time by up to 8.49% compared with the best known works. Copyright © 2015 John Wiley & Sons, Ltd.

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