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PID and low‐order controller design for guaranteed delay margin and pole placement
Author(s) -
Özbay Hitay,
Gündes A. Nazli
Publication year - 2022
Publication title -
international journal of robust and nonlinear control
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 1.361
H-Index - 106
eISSN - 1099-1239
pISSN - 1049-8923
DOI - 10.1002/rnc.5521
Subject(s) - control theory (sociology) , pid controller , cascade , transfer function , integrator , controller (irrigation) , phase margin , open loop controller , margin (machine learning) , constraint (computer aided design) , mathematics , computer science , control engineering , engineering , closed loop , control (management) , biology , temperature control , agronomy , amplifier , geometry , electrical engineering , bandwidth (computing) , operational amplifier , artificial intelligence , chemical engineering , machine learning , computer network
This article provides a simple low‐order controller design method (including PID controllers as special cases) for a class of unstable systems. First, PID controller design is considered for systems with two unstable poles and pole placement and delay margin issues are discussed. Then, a chain of integrators is considered with arbitrary stable dynamics in cascade. For a given desired minimum delay margin for this class of plants, a PID and low‐order controller design method is obtained in terms of an inequality constraint on the sum of k of the desired closed‐loop poles, where k is number of the integrators in the open‐loop transfer function.