Electrical properties of polysilicon nanowires for device applications

Polysilicon nanowires are synthesized using the well known and low cost technique commonly used in microelectronic industry: the sidewall spacer formation technique. Polysilicon layer is deposited by Low Pressure Chemical Vapour Deposition technique on SiO 2 wall patterned by conventional UV lithography technique. Polysilicon film is then plasma etched. Accurate control of the etching rate leads to the formation of nanometric size sidewall spacers with a curvature radius as low as 100 nm used as polysilicon nanowires. These polysilicon nanowires are first integrated into the fabrication of electrical devices as resistors and electrical properties are studied in function of in situ phosphorus doping levels. I(T) measurements show that polysilicon nanowires dark conductivity is thermally activated according to the Seto's theory. In addition, field effect transistors made with such polysilicon nanowires used as channel region highlight promising field effect behaviour. (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)