Open AccessDSPWM multilevel technique of 27‐levels based on FPGA for the cascaded DC/AC power converter operation
Author(s) -
SalgadoHerrera N.M.,
MedinaRíos J. Aurelio,
TapiaSánchez Roberto,
AnayaLara Olimpo,
RodríguezRodríguez J.R.
Publication year - 2018
Publication title -
international transactions on electrical energy systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.428
H-Index - 42
ISSN - 2050-7038
DOI - 10.1002/etep.2479
Subject(s) - field programmable gate array , converters , pulse width modulation , electronic engineering , power (physics) , harmonic , modulation (music) , computer science , direct current , gate array , engineering , electrical engineering , voltage , computer hardware , physics , quantum mechanics , acoustics
Summary In this paper, a digital sinusoidal pulse width modulation (DSPWM) multilevel technique of 27‐levels based on field programmable gate array (FPGA) is introduced, as an alternative to control of the direct current/alternating current multilevel power converters. The implementation of this technique with an FPGA XC3S500E model is achieved in the Xilinx Spartan‐3E FPGA platforms. An experimental prototype is implemented by 3‐cascaded H‐bridges controlled by the DSPWM multilevel technique, generating high efficiency, low cost, and lower harmonic content. The efficiency of the DSPWM multilevel technique using R, RL, RC, and RLC loads connected to the power network is verified.