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DSP‐based system for real‐time video communications
Author(s) -
Kassim A. A.,
Chua K. S.,
Fong F. K.,
Ranganath S.
Publication year - 1999
Publication title -
international journal of imaging systems and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.359
H-Index - 47
eISSN - 1098-1098
pISSN - 0899-9457
DOI - 10.1002/(sici)1098-1098(1999)10:1<47::aid-ima5>3.0.co;2-c
Subject(s) - computer science , digital signal processing , multiprocessing , digital signal processor , video processing , computer hardware , s video , coding (social sciences) , image processing , media processor , digital video , embedded system , signal processing , video decoder , video capture , real time computing , smacker video , telecommunications , frame (networking) , decoding methods , image (mathematics) , parallel computing , artificial intelligence , statistics , mathematics
This article describes the architecture of a digital signal processor (DSP)‐based real‐time video communications system and the implementation of the ITU‐T H.263 video coding standard on the system. The system incorporates a Texas Instruments TMS320C80 Multimedia Video Processor (MVP), a high‐performance, single‐chip multiprocessor‐based DSP that is optimized for image and video operations. Our implementation of the ITU‐T H.263 is optimized to make full use of the special features of the TMS320C80 MVP. The various related processing tasks have been efficiently distributed on the parallel processing elements within the TMS320C80 MVP. © 1999 John Wiley & Sons, Inc. Int J Imaging Syst Technol 10: 47–53, 1999