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Implementing a videoconferencing system based on a single‐chip signal and image processor
Author(s) -
Read Christopher J.,
Golston Jeremiah,
Füetterer Arne,
Fazlic Enes,
Miyazawa Hiroshi
Publication year - 1998
Publication title -
international journal of imaging systems and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.359
H-Index - 47
eISSN - 1098-1098
pISSN - 0899-9457
DOI - 10.1002/(sici)1098-1098(1998)9:6<434::aid-ima5>3.0.co;2-5
Subject(s) - computer science , videoconferencing , multiprocessing , emphasis (telecommunications) , computer hardware , embedded system , controller (irrigation) , software , operating system , telecommunications , agronomy , biology
This article describes an implementation of a flexible videoconferencing system, the Sony Mini‐1000, which is based on the Texas Instruments TMS320C80, a multiprocessor DSP, with software from IAT, Texas Instruments, and Sony. The H.320 videoconferencing standard used in the Mini‐1000 is described with emphasis on the H.261 video compression standard. We have heavily used many features of the TMS320C80 including the parallel processors optimized for imaging applications and the transfer controller, which is a powerful memory access engine. Mapping the H.320 standard on the Mini‐1000 system, particularly on the TMS320C80, is described in detail. © 1998 John Wiley & Sons, Inc. Int J Imaging Syst Technol 9: 434–441, 1998