
Cache Coherence Protocol Design and Simulation Using IES (Invalid Exclusive read/write Shared) State
Author(s) -
Luma Fayeq Jalil,
Maha Abdulkareem H. Al-Rawi,
Abeer Diaa Al-Nakshabandi
Publication year - 2017
Publication title -
mağallaẗ baġdād li-l-ʿulūm
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.167
H-Index - 6
eISSN - 2411-7986
pISSN - 2078-8665
DOI - 10.21123/bsj.2017.14.1.0219
Subject(s) - mesi protocol , computer science , cache coherence , cache , mesif protocol , cache pollution , parallel computing , page cache , cache invalidation , cache algorithms , non uniform memory access , bus sniffing , shared memory , operating system , cpu cache