Improving Program Efficiency by Packing Instructions into Registers
Author(s) -
Stephen Hines,
Joshua Green,
Gary Tyson,
David Whalley
Publication year - 2005
Publication title -
acm sigarch computer architecture news
Language(s) - English
Resource type - Journals
eISSN - 1943-5851
pISSN - 0163-5964
DOI - 10.1145/1080695.1069992
Subject(s) - computer science , compiler , register file , addressing mode , code (set theory) , cache , optimizing compiler , register allocation , parallel computing , computer architecture , processor register , instructions per cycle , programming language , instruction set , operating system , memory address , set (abstract data type) , central processing unit , semiconductor memory
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