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Millimeter-wave communications require multibeam beamforming to utilize wireless channels that suffer from obstructions, path loss, and multipath effects. Digital multibeam beamforming has maximum degrees of freedom compared to analog-phased arrays. However, circuit complexity and power consumption are important constraints for digital multibeam systems. A low-complexity digital computing architecture is proposed for a multiplication-free 32-point linear transform that approximates multiple simultaneous radio frequency (RF) beams similar to a discrete Fourier transform (DFT). Arithmetic complexity due to multiplication is reduced from the fast Fourier transform (FFT) complexity of O(N log N) for DFT realizations, down to zero, thus yielding a 46% and 55% reduction in chip area and dynamic power consumption, respectively, for the N = 32 case considered. This article describes the proposed 32-point DFT approximation targeting 1024 beams using a 2-D array and shows the multiplierless approximation and its mapping to a 32-beam subsystem consisting of 5.8 GHz antennas that can be used for generating 1024 digital beams without multiplications. Real-time beam computation is achieved using a Xilinx field-programmable gate array (FPGA) at 120 MHz bandwidth per beam. Theoretical beam performance is compared with measured RF patterns from both a fixed-point FFT and the proposed multiplier-free algorithm and is in good agreement.

Towards a Low-SWaP 1024-Beam Digital Array: A 32-Beam Subsystem at 5.8 GHz