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This article proposes a time-mode-modulation (TMM) digital quadrature power amplifier (PA), which can realize high power efficiency at power back-off (PBO) by applying the 1-bit delta&#x2013;sigma modulator (DSM) and hybrid finite impulse response (FIR) filter. The 1-bit DSM and digital mixer encode the multi-bit baseband    $I/Q$    input signal into a 1-bit signal for on/off controlling the 1-bit PA to realize the TMM operation. Capacitor arrays are not required in the proposed PA, and redundant power dissipation on charging the capacitor array in conventional switched capacitor PAs (SCPAs) is avoided. Furthermore, a hybrid FIR filter comprising a two-tap digital FIR filter and a two-tap transformer (XFMR) combined semi-digital FIR filter suppresses the DSM quantization noise (QN) to avoid efficiency degradation. The XFMR combined semi-digital FIR filter is insensitive to mismatches, which maintains the high linearity of the 1-bit TMM PA. The proposed TMM PA is fabricated in 65-nm CMOS. Without digital pre-distortion (DPD), it achieves 26.4% power-added efficiency (PAE) with 40-MSymbol/s 64-quadrature amplitude modulation (QAM) signal and 20.9% PAE with 20-MSymbol/s 256-QAM signal at 2.6 GHz.

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta–Sigma Modulator and Hybrid FIR Filter