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The increasing complexity of the systems-on-a-chip, as well as their raising operating frequencies, leads to the more complex and accurate design of the systems for generating clock signals. In this case, it becomes important not only to define all the characteristics that directly affect the accuracy of the generated signals, but also the practical possibility of estimating them using computer simulation. The reason for this is that the numbers of systems, which require modeling, develop faster than the computing power of a data processor. This paper discusses the possibilities of analyzing clock generation systems to estimate the value of random noise. The development of data transmission interfaces seeksto increase the speed of information transmission, whereas this development is proceeding in several directions.Firstly, the increase in speed may be achieved refining modulation systems. Another way to increase the speed of information transfer is to change the data transfer protocol. However, the most effective method of increasing the data transfer rate for any interfaces is still to increase the transmission frequency, i.e. reducing the duration of a single interval, which leads to stricter requirements for both the transmitter and the receiver involved in the physical implementation of the data transfer interface (PHY).

Obtaining a behavioral model for evaluating the definition of significant moments of the digital signal from perfect provisions in time