English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Tools annual

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Tools monthly

Global: Zendy Plus monthly

Presents the access of premium content as premium feature

Premium Content

Global: Zendy Plus annual

Global: Zendy Free Plan

Abstract  Valley degrees of freedom, providing a novel way to increase capacity and efficiency of information processing, have become an important instrument for photonics. Experimental studies on photonic topological valley kink states at interfaces between regions with opposite valley‐Chern numbers have attracted much attention; however, they are restricted to zigzag‐type interfaces, largely limiting their applications such as geometry‐dependent topological channel intersections. Here, valley kink states at generic interfaces in subwavelength substrate‐integrated photonic circuitry are experimentally demonstrated and manipulated. The robustness of the kink states is verified by measuring transmissions of the kink states through twisted interfaces and interfaces with disorders. Based on the valley kink states at generic interfaces, several topological channel intersections where photonic transport paths are related to geometries of the intersections are realized. In comparison to those in previous work, these valley photonic crystals have subwavelength thicknesses and excellent self‐consistent electrical shielding, which are perfectly compatible with conventional substrate‐integrated photonic circuitry. This work opens a door to manipulate photonic valley pseudo‐spins in lightweight substrate‐integrated circuitry with robustness and easy access.

Valley Kink States and Topological Channel Intersections in Substrate‐Integrated Photonic Circuitry