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Event-based vision represents a paradigm shift in how vision information iscaptured and processed. By only responding to dynamic intensity changes in thescene, event-based sensing produces far less data than conventional frame-basedcameras, promising to springboard a new generation of high-speed, low-powermachines for edge intelligence. However, processing such dynamically sparseinput originated from event cameras efficiently in real time, particularly withcomplex deep neural networks (DNN), remains a formidable challenge. Existingsolutions that employ GPUs and other frame-based DNN accelerators oftenstruggle to efficiently process the dynamically sparse event data, missing theopportunities to improve processing efficiency with sparse data. To addressthis, we propose ESDA, a composable dynamic sparse dataflow architecture thatallows customized DNN accelerators to be constructed rapidly on FPGAs forevent-based vision tasks. ESDA is a modular system that is composed of a set ofparametrizable modules for each network layer type. These modules share auniform sparse token-feature interface and can be connected easily to composean all-on-chip dataflow accelerator on FPGA for each network model. To fullyexploit the intrinsic sparsity in event data, ESDA incorporates the use ofsubmanifold sparse convolutions that largely enhance the activation sparsitythroughout the layers while simplifying hardware implementation. Finally, anetwork architecture and hardware implementation co-optimizing framework thatallows tradeoffs between accuracy and performance is also presented.Experimental results demonstrate that when compared with existing GPU andhardware-accelerated solutions, ESDA achieves substantial speedup andimprovement in energy efficiency across different applications, and it allowsmuch wider design space for real-world deployments.

A Composable Dynamic Sparse Dataflow Architecture for Efficient Event-based Vision Processing on FPGA