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Analog in-memory computing (AiMC) is an emerging technology that showsfantastic performance superiority for neural network acceleration. However, asthe computational bit-width and scale increase, high-precision data conversionand long-distance data routing will result in unacceptable energy and latencyoverheads in the AiMC system. In this work, we focus on the potential ofin-charge computing and in-time interconnection and show an innovative AiMCarchitecture, named AiDAC, with three key contributions: (1) AiDAC enhancesmultibit computing efficiency and reduces data conversion times by groupingcapacitors technology; (2) AiDAC first adopts row drivers and column timeaccumulators to achieve large-scale AiMC arrays integration while minimizingthe energy cost of data movements. (3) AiDAC is the first work to supportlarge-scale all-analog multibit vector-matrix multiplication (VMM) operations.The evaluation shows that AiDAC maintains high-precision calculation (less than0.79% total computing error) while also possessing excellent performancefeatures, such as high parallelism (up to 26.2TOPS), low latency (<20ns/VMM),and high energy efficiency (123.8TOPS/W), for 8bits VMM with 1024 inputchannels.

AiDAC: A Low-Cost In-Memory Computing Architecture with All-Analog Multi-Bit Compute and Interconnect