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Coarse-grained reconfigurable arrays (CGRAs) have gained attention in recentyears due to their promising power efficiency compared to traditional vonNeumann architectures. To program these architectures using ordinary languagessuch as C, a dataflow compiler must transform the original sequential,imperative program into an equivalent dataflow graph, composed of dataflowoperators running in parallel. This transformation is challenging since theasynchronous nature of dataflow graphs allows out-of-order execution ofoperators, leading to behaviors not present in the original imperativeprograms.  We address this challenge by developing a translation validation techniquefor dataflow compilers to ensure that the dataflow program has the samebehavior as the original imperative program on all possible inputs andschedules of execution. We apply this method to a state-of-the-art dataflowcompiler targeting the RipTide CGRA architecture. Our tool uncovers 8 compilerbugs where the compiler outputs incorrect dataflow graphs, including a datarace that is otherwise hard to discover via testing. After repairing thesebugs, our tool verifies the correct compilation of all programs in the RipTidebenchmark suite.

WaveCert: Translation Validation for Asynchronous Dataflow Programs via Dynamic Fractional Permissions