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Recent reports on machine learning (ML) and machine vision (MV) devices havedemonstrated the potentials of 2D materials and devices. Yet, scalable 2Ddevices are being challenged by contact resistance and Fermi Level Pinning(FLP), power consumption, and low-cost CMOS compatible lithography processes.To enable CMOS+2D, it is essential to find a proper lithography strategy thatcan fulfill these requirements. Here, we explore modified van der Waals (vdW)deposition lithography and demonstrate a relatively new class ofvan-der-Waals-Field-Effect-Transistors (vdW-FETs) based on 2D materials. Thislithography strategy enables us to unlock high performance devices evident byhigh current on-off ratio (Ion/Ioff), high turn-on current density (Ion), andweak Fermi Level Pinning (FLP). We utilize this approach to demonstrate agate-tunable near-ideal diode using MoS2/WSe2 heterojunction with an idealityfactor of ~1.65 and current rectification of 102. We finally demonstrate ahighly sensitive, scalable, and ultra-low power phototransistor using MoS2/WSe2 vdW-FET for Back-End-of-Line (BEOL) integration. Our phototransistorexhibits the highest gate-tunable photoresponsivity achieved to date for whitelight detection with ultra-low power dissipation, enabling ultra-sensitive,ultra-fast, and efficient optoelectronic applications such as in-sensorneuromorphic machine vision. Our approach shows the great potential of modifiedvdW deposition lithography for back-end-of-line CMOS+2D applications.

Unlocking High Performance, Ultra-Low Power Van der Waals Transistors: Towards Back-End-of-Line In-Sensor Machine Vision Applications