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Data movement between the processor and the main memory is a first-orderobstacle against improving performance and energy efficiency in modern systems.To address this obstacle, Processing-using-Memory (PuM) is a promising approachwhere bulk-bitwise operations are performed leveraging intrinsic analogproperties within the DRAM array and massive parallelism across DRAM columns.Unfortunately, 1) modern off-the-shelf DRAM chips do not officially support PuMoperations, and 2) existing techniques of performing PuM operations onoff-the-shelf DRAM chips suffer from two key limitations. First, thesetechniques have low success rates, i.e., only a small fraction of DRAM columnscan correctly execute PuM operations because they operate beyondmanufacturer-recommended timing constraints, causing these operations to behighly susceptible to noise and process variation. Second, these techniqueshave limited compute primitives, preventing them from fully leveragingparallelism across DRAM columns and thus hindering their performance benefits.  We propose PULSAR, a new technique to enable high-success-rate andhigh-performance PuM operations in off-the-shelf DRAM chips. PULSAR leveragesour new observation that a carefully crafted sequence of DRAM commandssimultaneously activates up to 32 DRAM rows. PULSAR overcomes the limitationsof existing techniques by 1) replicating the input data to improve the successrate and 2) enabling new bulk bitwise operations (e.g., many-input majority,Multi-RowInit, and Bulk-Write) to improve the performance.  Our analysis on 120 off-the-shelf DDR4 chips from two major manufacturersshows that PULSAR achieves a 24.18% higher success rate and 121% higherperformance over seven arithmetic-logic operations compared to FracDRAM, astate-of-the-art off-the-shelf DRAM-based PuM technique.

PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips