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Modern technology-independent logic synthesis has been developed to optimizefor the size and depth of AND-Inverter Graphs (AIGs) as a proxy of CMOS circuitarea and delay. However, for non-CMOS-based emerging technologies, AIG size anddepth may not be good cost estimations. Dedicated algorithms optimizing formore complex cost functions have been proven effective for their specifictarget applications yet require time and experts in both logic synthesis andthe targeted technology to develop. In this work, we propose AnySyn, acost-generic optimization framework for agile experimentation and prototypingof various customized cost functions before investing in developing specializedalgorithms. Experimental results show that AnySyn outperforms non-specializedsize and depth optimization algorithms by 14% and 19% on average and achievescomparable results to specialized algorithms within acceptable CPU time.

AnySyn: A Cost-Generic Logic Synthesis Framework with Customizable Cost Functions