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Third-party intellectual property cores are essential building blocks ofmodern system-on-chip and integrated circuit designs. However, these designcomponents usually come from vendors of different trust levels and may containundocumented design functionality. Distinguishing such stealthy lightweightmalicious design modification can be a challenging task due to the lack of agolden reference. In this work, we make a step towards design for assurance bydeveloping a method for identifying and preventing hardware Trojans, employingfunctional verification tools and languages familiar to hardware designers. Wedump synthesized design netlist mapped to a field programmable gate arraytechnology library and perform switching as well as coverage analysis at thegranularity of look-up-tables (LUTs) in order to identify specious signals andcells. We automatically extract and formally prove properties related toswitching and coverage, which allows us to retrieve Trojan trigger condition.We further provide a solution to preventing Trojan from activation byreconfiguring the confirmed malicious LUTs. Experimental results havedemonstrated that our method can detect and mitigate Trust-Hub as well asrecently reported don't care Trojans.

Design for Assurance: Employing Functional Verification Tools for Thwarting Hardware Trojan Threat in 3PIPs