English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Plus monthly

Global: Zendy Tools annual

Global: Zendy Tools monthly

Global: Zendy Free Plan

Compute-in-memory (CIM) presents an attractive approach for energy-efficientcomputing in data-intensive applications. However, the development of suitablememory designs to achieve high-performance CIM remains a challenging task.Here, we propose a cryogenic quasi-static embedded DRAM to address thelogic-memory mismatch of CIM. Guided by the re-calibrated cryogenic devicemodel, the designed four-transistor bit-cell achieves full-swing data storage,low power consumption, and extended retention time at cryogenic temperatures.Combined with the adoption of cryogenic write bitline biasing technique andreadout circuitry optimization, our 4Kb cryogenic eDRAM chip demonstrates a1.37$\times$10$^6$ times improvement in retention time, while achieving a 75times improvement in retention variability, compared to room-temperatureoperation. Moreover, it also achieves outstanding power performance with aretention power of 112 fW and a dynamic power of 108 $\mu$W at 4.2 K, which canbe further decreased by 7.1% and 13.6% using the dynamic voltage scalingtechnique. This work reveals the great potential of cryogenic CMOS forhigh-density data storage and lays a solid foundation for energy-efficient CIMimplementations.

Cryogenic quasi-static embedded DRAM for energy-efficient compute-in-memory applications